芯成半导体（上海）有限公司

公司简介

ISSI成立于1988年，是全球技术领先的集成电路设计企业，其分支机构分布于中国大陆、中国台湾、美国、欧洲、以色列、韩国、日本、新加坡、印度等全球各地。目前为北京君正集成电路有限公司全资子公司。ISSI专注于高性能、高品质、高可靠性的各类存储芯片（DRAM, SRAM, Flash等）的研发、设计和销售，另有子品牌LUMISSIL专注于模拟混合信号芯片的研发和销售。产品主要面向全球汽车电子、工业、医疗、网络通信及特定消费类市场。2021年度，ISSI荣获中国IC设计成就奖之十大IC设计公司，32Mb SerialRAM产品荣获中国芯优秀技术创新产品奖。

公司电话：021-50802288

公司地址：上海市浦东新区金桥镇锦绣东路2777弄25号楼

岗位需求

Marketing Dept.

Flash FAE (Shanghai)

Primary Responsibilities:

• Knowledge about flash memory product (UFS/eMMC/ /NAND/Nor) operation system, memory interface, file system are welcome.

• Provide product (Nor, NAND, eMMC,UFS) training to the field sales force, distribution sales people and customers

• Provide flash technical support to customers and the field sales force. Support includes solving the issue in customer site, applications advice, product recommendations.

• Strong understanding of customer applications and engineering architectures for ISSI focus application (Auto, IM, communication and selected consumer market) segment is very desirable.

• Skills in identifying and qualifying ISSI products in chipset company and third party controller reference designs very essential

• Provide the competitor cross to sales team and finish assigned the paper work.

Qualifications:

• Must have BS in Electrical Engineering, Electronics, or Computer

• Ideal candidate will have a strong understanding of current and emerging DRAM/SRAM/Flash trends in applications such as Automotive, IM and Consumer

• Strong communication and presentation skills.

• Fluency in both English and Chinese.

• Position involves domestic travel.

Design Dept.

Analog circuit design engineer (Shanghai\Beijing\Hangzhou)

Primary Responsibilities:

Ÿ Design/Verify/Optimize all analog circuit blocks used in memory product, including bandgap reference, amplifier, LDO, charge pump, PLL etc.

Ÿ Guide layout designer to floorplan/implementation the layout and take responsibility of post layout simulation.

Ÿ Design the circuit for test, mainly focus on the analog part but not limited.

Ÿ Design high speed IO circuit with equalization tech implemented (DFE, CTLE etc), make the transmission line model and verify the signal integrity.

Ÿ Provide support to PE for silicon test/debug

Qualifications:

Ÿ Good knowledge and deep understanding CMOS circuit design.

Ÿ Familiar with EDA design tools such as spectre, hspice, finesim, Virtuoso etc.

Ÿ Experience in high-speed IO design is preferred.

Ÿ Experience in mix-signal circuit design, or fullchip analog circuits system plan/implement, DRAM memory design is preferred.

Ÿ Good team player and communication skills.

Ÿ Good learning competency, self-motivated in a flexible and dynamic environment.

DRAM circuit designer

Primary Responsibilities:

Ÿ Design the circuits of IPs used in memory products, including DLL, CMD controller, data path, DFT etc.

Ÿ Simulate, verify and analyze memory functionality and performance.

Ÿ Optimize the circuit timing margin under different PVT conditions.

Ÿ Make documents for the block descriptions.

Ÿ Cooperate with PT for post silicon results debugging.

Qualifications:

Ÿ Good knowledge and deep understanding CMOS circuit design.

Ÿ Familiar with EDA design tools such as spectre, hspice, finesim, Virtuoso etc.

Ÿ Experience in memory design is preferred.

Ÿ Good team player and communication skills.

Ÿ Good learning competency, self-motivated in a flexible and dynamic environment.

DRAM verification engineer

Primary Responsibilities:

Ÿ Make the verification plan based on Spec and internal design request for completely cover function and timing verification.

Ÿ Build the digital and mix-signal verification testbench to support the verification at the whole DRAM chip level.

Ÿ Develop the behavior model for the fullchip and array based on the memory structure and functionality.

Ÿ Verification methodology development to automate the procedure and improve the verification coverage.

Ÿ Coordinate with design team to debug the design.

Qualifications:

Ÿ Knowledge and understanding of CMOS circuit design.

Ÿ Familiar with EDA tools such as Spectre, finesim, NC-verilog, VCS etc.

Ÿ Experience in SystemVerilog, UVM is a plus.

Ÿ Experience in DRAM product verification is a plus.

Ÿ Good team player and communication skills.

Ÿ Good learning competency, self-motivated in a flexible and dynamic environment.

岗位优势

Ÿ 已现有项目可以直接加入

Ÿ 可接受实习

Ÿ 表现优异者可提供转正机会

Ÿ 弹性工作时间

投递渠道

邮箱：syao@issi.com/Sunny_wang@issi.com